Professor and Vice Chair，UCLA Electrical Engineering Department Biography Jason C.S. Woo received the B.A.Sc. (Hons.) degree in engineering science from the University of Toronto, Canada, in 1981, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1982 and 1987, respectively. He joined the UCLA Electrical Engineering Department in 1987 and is currently a professor. Prof. Woo served on the IEEE IEDM program committee from 1989-1990 and 1994-1996, and was the publicity vice-chairman in 1992 and the publicity chairman in 1993. He is the workshop chairman and has been a technical committee member of the VLSI Technology Symposium since 1992. Since 1993, he has been on the IEEE SOI conference committee and was the technical program chairman for the conference in 1999. He has also been appointed recently to serve as the chair of IEEE Electronic Device Society ad hoc committee on short courses. He has authored or coauthored over 100 papers in technical

Chap 1.  Short Channel CMOS Devices ( 6 hs) 
    1.1 Summary of Long Channel CMOS Device Characteristics .  
1.1.1 D.C I-V Characteristics . 
1.1.2 CMOS Voltage Gain Stage . 
1.1.3 Weak Inversion (Subthreshold) Characteristics. 
1.2      CMOS Device Scaling and ITRS  Road Map.  
1.3      Short channel effects  ( SCE).   
                           1.3.1 Reduction of Vth in Short Channel MOSFET . 
                       1.3.2 Drain-Induced Barrier Lowering (DIBL) ,  
                       1.3.3Channel Length Dependence of Vth .  
                       1.3.4 Velocity Saturation and Short Channel Device  
                                I-V characteristics . 
                1.4      MOS Device Design .  
                           1.4.1 MOSFET Scaling 
                                Constant Field Scaling scheme 
                Generalized Scaling scheme 
                       1.4.2  Non-uniform Doping and Retrograde Well Doping  
                       1.4.3  Shallow s/d Junctions , s/d Extension,  and Raised s/d  
              1.5     CMOS Devices in Ballistic Transport Limit  
                     1.5.1 Ballistic Transport Limit 
                        1.5.2  Quasi-Ballistic Transport and Back-Scattering Coefficient 
                        1.5.3  Velocity Overshoot in Short Channel Devices  
            1.6     Summary of I-V Characteristics of CMOS Transistors 
Chap 2. New Physical Effects ( 3 hs ) 
2.1 Auger Recombination and Impact Ionization . 
2.2 Carrier Quantization in a Quantum Well. 
2.2.1 Carrier Quantization. 
2.2.2 Density of States in Quantum Well . 
2.2.3The Impact of Carrier Quantization in MOS Device 
Characteristics . 
2.3 Quantum Tunneling through a Potential Barrier . 
2.3.1 Electron Tunneling through an Electron Barrier. 

2.3.2 Hole Tunneling through a Hole Barrier.

2.3.3 Electron Tunneling from a Trap in the Oxide Gap to the 
Conduction Band. 
2.3.4 Band-to-Band Tunneling. 
2.3.5 Gate-Induced-Drain-Leakage (GIDL) in MOSFETs. 
2.4 Gate Tunneling Current  
          Fowler-Nordheim (FN) and Direct Tunneling (DT) , 
            Electron Tunneling and Hole Tunneling, Carrier Separation  
            Measurements.  
            Through Channel and through s/d Tunneling , Different  
            Tunneling Current Components in n and p MOSFETs.  
            Analytical Expressions for FN and DT tunneling currents . 
Chap 3. Reliability and Device Lifetime  ( 3 hs) 

3.6 New Reliability Issues for  100 or sub 100 nm Technology  
Node CMOS Devices 
Chap 4. New Materials ( 4hs) 
4.1 High-k dielectrics    
4.1.1 Gate dielectrics  
        Equivalent oxide thickness (EOT) 
4.1.2 MIM capacitors .  
                  4.1.3 Requirements for high-k dielectric materials  
                     4.1.4 Potential high k and middle k Dielectric Materials  
                  4.1.5. Tunneling current  through  middle k  dielectric stacks : 
                               oxynitride stacks.  
                     4.1.6 Tunneling current through high k dielectric stacks : HfO2 
  
                              and (HfO2)x(Al2O3)1-x gate stacks and the scalability of  
                              future  MOSFETs.  
4.2 Metal gate materials
4.2.1  Introduction 
4.2.2   Requirements for metal gate materials . 
4.2.3   Work functions for potential metal gate materials . 
4.2.4   Metal Alloy and Dual work function metal gates  
4.3 New channel materials  
4.3.1   Introduction 
                     4.3.2   SiGe layer and Strained Si layer  
                                Critical thickness of pseudomorphic layer 
               Si1-xGex  epi grown on Si substrate 
                                Strained Si epi grown on relaxed Si1-xGex/Si . 
                           Strained Ge epi grown on relaxed Si1-xGex/Si 
                     4.3.3 Physical analysis of mobility enhancement  
                              Bulk semiconductor electron and hole effective mass 
                         Alloy scattering   
                              Stress induced energy band change  
              Different scattering mechanism . 
                              What kind of strain is good. 
                              Process-induced local strain in the channel region. 
                    4.3.4 Bi-axial  strain and uniaxial strain , process induced  
                             local strain

3.1 Introduction 
      Fowler-Nordheim (FN) Stress;  
      Hot Carrier (HC) stress ;  
      Negative Bias Temperature Instability (NBTI)  . 
3.2 Interface Traps and Oxide Traps
Interface traps , charge contribution from interface traps, oxide 
traps and oxide charge .  
3.3  Interface trap Measurements  
3.3.1 C-V methods 
3.3.2 Charge-Pumping (CP) method  
3.3.3 Direct-Current Current-Voltage (DCIV) method. 
3.4 Variation of Device Parameters under Stresses and Device 
Lifetime . 
                      Variation of Vth under FN stress and NBTI .  
           Dynamic NBTI . 
                        Variation of Vth under HC stress ( Hot carrier degradation ).       
                        Worst HC degradation condition . 
                        Variation of  gm  under FN or HC stress   
                        Variation of other device parameters under stress ( Rs/d ,  
                        Cg-s/d ,GIDL ) 
3.5 Oxide Degradation and Oxide Reliability   
3.5.1 Oxide breakdown (BD) and Quasi-Breakdown (QB) 
( Soft Breakdown ), QBD and  TBD  
3.5.2 Cumulative Distribution Function and Weibull Plot  
3.5.3 Stress Induced  Leakage Current  (SILC)